Intel chips have been RISC-like internally for years. They have an instruction decode stage that converts x86 instructions into an internal ISA that's more RISC-ish.
Ars Technica, as always, has the details of how that has evolved over the years. Can't remember when the article in question was written, though.
Ars Technica, as always, has the details of how that has evolved over the years. Can't remember when the article in question was written, though.