First and foremost, voltage divider outputs voltage proportional to input: prior circuitry fails, outputs 18V instead of 5V and you fry at least GPIO port with ~12V. That is expected behaviour. Furthermore, you cannot add resistive load to a voltage divider without affecting division ratio. Optocouplers, Linear regulators (including commonly known LDOs) do not have this property. You can call it paranoia, but that's just sensible design